
300mA HIGH SPEED, EXTREMELY LOW NOISE CMOS LDO REGULATOR AP2126
2
Sep. 2012 Rev. 1. 5 BCD Semiconductor Manufacturing Limited
Data Sheet
Figure 2. Pin Configuration of AP2126 (Top View)
Pin Configuration
Functional Block Diagram
K Package
(SOT-23-5)
V
IN
GND
V
OUT
ADJShutdown
Figure 3. Functional Block Diagram of AP2126
Shutdown
and
Logic Control
Current Limit
And
Thermal
Protection
MOS Driver
V
REF
Shutdown
GND
V
IN
V
OUT
ADJ
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